AMD is full of sincerity, and new technology supports Ryzen 5000
The COMPUTEX-2021 conference not only demonstrated the first application of 3D stacking technology, the “3D vertical cache bonded” technology appeared in AMD Ryzen 5000 series processor products, and for a wide range of applications, the new processor will have a “Terror” performance improvements.
It is reported that the interconnect density of the prototype 3D chip AMD unveiled this time is more than 200 times that of 2D and 15 times that of existing 3D packaging solutions; all this is from the close cooperation between AMD and TSMC. The new 3D solution brought by AMD this time consumes less energy and is by far the most flexible active 3D stacking technology in the world. (active-on-active silicon stacking technology)
AMD computex2021 “Su Ma” showcases the latest CHIPLET technology (Source: AMD)
AMD not only brings Ryzen 5000 series processors, but also said that it will start producing high-end products supported by 3D stacking technology by the end of 2021. At present, its computing and graphics processing technology has a wide range of applications in the automotive and mobile markets, including new energy leader Tesla , Electronic equipment giant Samsung and other manufacturers; Tesla Model S and Model X’s latest in-car entertainment systems use AMD’s Ryzen series APU and RDNA2 architecture GPU, and also support 3A game masterpieces; cooperate with Samsung to develop the next-generation Exynos SoC, which uses A custom graphics IP core based on the AMD RDNA 2 architecture, bringing new technologies such as ray tracing and variable rate shading to the flagship.
ComputeX 2021 AMD CEO Lisa Su (Source: Google)
TSMC’s N6RF and N5A technical performance has been comprehensively improved
Brand new processor Chips are a product of design and, ultimately, a manufacturing effort. TSMC also unveiled its industry-leading expertise at its technical seminar: including its advanced 3D Fabric packaging and chip stacking technologies. New launches include the N5A series for cars; N6RF and WiFi 6/6E for next-generation 5G smartphones; and a series of custom chips using 3D Fabric technology.
TSMC N5A technology node roadmap (Source: TSMC)
N5A is the latest member of TSMC’s 5nm process technology node. It is designed to meet the increasing computing power of in-vehicle computers and the logical computing needs of complex scenarios, such as AI-enabled assisted driving and intelligent in-vehicle central control. The N5A series uses the same technology used in supercomputers today on automotive chips, greatly improving the performance of the N5A while meeting the quality and reliability requirements of AEC-Q100 Grade 2 and other automotive safety and quality standards , power efficiency and logic density, TSMC also expects chips produced in its N5A process to be available in the third quarter of 2022.
TSMC also disclosed to the public that since the N4 R&D plan was announced last year, the current progress has been extremely smooth, and the risk mass production plan will be carried out in the third quarter of 2021; and it is worth mentioning that its N3 technology is currently the world’s first process technology, Mass production will also begin in the second half of 2022. With the proven FinFET transistor structure, N3 will provide up to 15% speed gain, or 30% lower power consumption than N5, and provide up to 70% increase in logic density.
TSMC N3 3nm technology (Source: google)
Not only did TSMC have the latest action at the N5 node, but the conference also introduced the N6RF process. Its advanced N6 process technology was directly introduced into 5G radio frequency (RF) and WiFi 6/6E with the advantages of power, performance and area. in the solution. It is reported that the performance of the N6RF transistor at the 16nm node is more than 16% higher than that of the previous generation RF technology. The 5G RF transceiver supported by N6RF can significantly reduce power and area in the frequency band below 6kMHz and millimeter wave, but it will not affect the supply. Performance, functionality and battery life for consumers.
TSMC’s 3D Silicon Stacking and Advanced Packaging Technology 3DFabric Series
For high-performance computing applications, TSMC will also provide larger floor plan sizes for its InFO oS and CoWoS packaging solutions in 2021, enabling larger layouts for chip layouts and high-bandwidth memory integrated chips. In addition, TSMC’s SoIC chipset (CoW) will be certified at N7-on-N7 this year, with mass production planned for 2022 at a new fully automated Fab.
TSMC 3D Fabric CoWoS packaging technology (Source: TSMC)
And for mobile platform applications, TSMC is introducing its InFO_B solution, which is designed to integrate a powerful mobile processor in a thin, compact package, allowing manufacturers to improve performance and energy efficiency while supporting manufacturers in the package. Stack DRAM chips on top, and make the entire circuit on one chip.
TSMC InFo_B solution (Image source: Google)
That is to say, with the support of TSMC’s latest technology, AMD’s products at this conference can be described as amazing. At the same time, AMD CEO Lisa Su (netizens like to say: “Su Ma”) also said: As AMD continues to lead the pace of industry innovation, AMD’s high-performance computing and graphics technologies will be adopted by more and more industry and business partners.
With the launch of the new Ryzen and Radeon series processors, the ecosystem of AMD products and technologies in the entire computer industry will become more and more complete. At the same time, he also said that the next 3D Fabric innovation technology at the forefront of chip manufacturing is the future of the entire industry. The CHIPLET technology originally used for large supercomputers is integrated into the design concept of personal computers, automotive chips and mobile devices. It greatly improves user performance, power consumption and overall experience.
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