“As the name implies, a phase-locked loop (PLL) uses a phase detector to compare the feedback signal with a reference signal, locking the phases of the two signals together. While there are many uses for this feature, PLLs are most commonly used today for frequency synthesis, typically as a local oscillator (LO) in an upconverter/downconverter, or as a high-speed analog-to-digital converter (ADC) or digital-to-analog converter DAC (DAC).
“
As the name implies, a phase-locked loop (PLL) uses a phase detector to compare the feedback signal with a reference signal, locking the phases of the two signals together. While there are many uses for this feature, PLLs are most commonly used today for frequency synthesis, typically as a local oscillator (LO) in an upconverter/downconverter, or as a high-speed analog-to-digital converter (ADC) or digital-to-analog converter DAC (DAC).
Until recently, we paid little attention to phase behavior in these circuits. But with ever-increasing demands for efficiency, bandwidth and performance, RF engineers must introduce new technologies to improve spectral and power efficiency. Repeatability, predictability, and adjustability of signal phases play an increasingly important role in modern communications and instrumentation applications.
everything is relative
Regarding phase measurement, it is meaningless if not relative to another signal or relative to the original phase. For example, using a vector network analyzer (VNA) to measure the phase of a two-port network such as an amplifier, the output phase is measured relative to the input phase ANG (S21). The single input phase refers to the reflected phase relative to the incident phase ANG (S11). On a PLL synthesizer, a phase measurement refers to a measurement of the phase relative to an input reference or a measurement of phase between signals. The ideal of any phase measurement is to measure the exact expected value compared to the original phase, but nonlinearity, non-ideality, temperature differences and board traces, and other manufacturing variations can make the phase more susceptible to changes in signal generation. For the purposes of this document, “in-phase” refers to signals that have the same amplitude and timing characteristics; deterministic phase means that the phase shift between signals is known and predictable.
Oscilloscope measures phase
To compare the phase of two different frequencies, a high-speed oscilloscope can be used to compare the output phase to the reference phase, which is a relatively intuitive method. In order to be intuitive, the input phase and output phase must usually be integer multiples of each other. This is relatively common in many clock circuits. For integer-N PLLs, the relationship between the input frequency (REFIN) and the output frequency (RFOUT) is usually deterministic and repeatable. Just place the scope probe on REFIN and RFOUT, but take care to only capture the signal when the established phase is determined. Advanced oscilloscopes like the RTO1044 allow event trigger activation only when certain conditions are met: such as when a specific digital pattern is written to the PLL device and a rising edge of a known signal occurs. Given that there may be some delay between the writing of the digital mode and the final signal settling, it is critical to insert some delay between these two events, which is possible with this particular model of instrument.
The measurements in Figure 1 were made to confirm that the phase delay of the ADF4356 PLL relative to a known reference signal (in this case, another ADF4356 set to the same output frequency) is constant and repeatable at power-up. To properly set up the instrument, connect two low-speed probes to the CLK and DATA lines of the ADF4356 SPI interface. To write a digital pattern to a specific frequency, you must wait 1 second before the instrument captures a time domain plot showing the outputs of the two PLLs.
Figure 1. Integer-N Divide Setup
For this measurement, two ADF4356 PLLs were locked to a VCO frequency of 4GHz and divided over the range of 8MHz to 500MHz, with one PLL turned on and off repeatedly using a software power-down feature. The oscilloscope takes 119 acquisitions in infinite duration mode with a constant and repeatable phase difference between the two PLLs. To ensure that the phase difference is repeatable, there are a number of considerations to follow. In comparison, a low R divider value introduces less uncertainty than a high R divider value, and it is critical to feed the divided feedback from the VCO output to the N counter input. Given that the ADF4356 PLL and VCO contain 1024 distinct VCO bands, it is important to use a manual calibration overlay procedure to remove this uncertainty.
Phase Resynchronization Definition
Phase resynchronization refers to the ability of a fractional-N PLL to return the same phase shift at every given frequency. That is, after frequency A with phase P1 is changed to frequency B, when the frequency is reset back to F1, it is observed that it still has the same original phase P1. This definition ignores changes caused by factors such as VCO drift, leakage current, temperature changes, etc.
Resynchronization sends the reset pulse to the fractional-N sigma-delta modulator, which puts it in a known repeatable state. This reset pulse needs to be applied after completing the frequency settling mechanisms such as VCO band selection and loop filter settling time. Its value is controlled by the timeout counter in register 12. Recent PLLs are able to adjust the timing of this reset pulse, enabling a degree of output signal tunability. In addition, it can change timing in 360°/225 steps, making measurements easier than most instruments.
Figure 2. Fractional-N Resynchronization, Frequency Range 4694 MHz to 4002.5 MHz
For this experiment, both ADF4356 VCOs were set to 4002.5 MHz with a divide-by-8 frequency. The VCO frequency of the second PLL was set to 4694MHz and then set back to 4002.5MHz. Examining the PLL behavior with an oscilloscope shows that after 1700 frequency changes, the PLL settles at the same phase every time.
To characterize different phase shift characteristics, the phase word is set to 4194304/225 (equivalent to 90°). Set the corresponding similar values for 90°, 180°, 270°, and 0° and look at the oscilloscope again (Figure 3).
Figure 3. Phase Resynchronization with Variable Phase Shift
Four equally spaced signals were observed relative to the original signal on channel 1, confirming the accuracy of phase resynchronization with programmable offset.
This feature is very useful and means that a look-up table of phase values can be created for each user frequency, recording the phase value with each use. In applications that require combining four in-phase LO frequencies, phase resynchronization and offset functions are used to adjust the output phase, which together provide 6dB lower phase noise. If used as an adjustable LO (perhaps on the first stage of a signal analyzer), the resynchronization and phase shift functions allow the user to perform a one-time calibration at power-up to determine the exact phase value of each LO. When used as an LO, the phase value can be set per LO as needed, eliminating the need to perform calibration at each frequency.
Figure 4. Phase-critical applications requiring precise control of PLL output phase
For phase-critical applications like a network analyzer, the circuit can measure the phase value at each frequency at power-up and set it as needed, as the LO acts on the entire target range.
Measuring Phase, Vector Signal and Network Analyzers
Vector signal and network analyzers can also be used to characterize phase behavior, although they are limited to comparing the phase of a device to its initial value. Advanced analyzers such as FSWP can be put into FM demodulation mode and selected for phase output.
This is useful for evaluating the phase resynchronization feature on the ADF4356 PLL. The trace below (Figure 5) shows the ADF4356 phase shifted by 180° at an output frequency of 5025MHz.
Figure 5. FSUP FM Demodulator Output with 180° Phase Shift
Phase adjustment
The phase adjustment feature avoids sigma-delta modulator resets by simply adding a phase word between 0° and 360° to the existing phase. This is useful in applications where phase resetting is not desired. It can be used to dynamically adjust the phase word to compensate for phase differences due to effects such as temperature.
Phase adjustment adds phase to the existing signal each time R0 is updated (with the programmed value of Register 3). It does not contain reset pulses such as phase resynchronization. The following measurements from the FSWP represent the original signal increased by 90° (Fig. 6) and 270° (Fig. 7). In both cases, the output frequency of the ADF4356 was set to 5025 MHz before the phase change.
Figure 6. 90° Variation
Figure 7. 270° Variation
Behavior over the entire temperature range
The physical parameters of an Inductor change with temperature, as do its electrical properties, which appear as phase changes. To reduce this phase change, the user can set the desired phase shift to maintain the same phase. Two ADF4356 PLLs with an output frequency set to 4GHz, placed in the same furnace chamber with the same phase, closely track each other’s phase (Figure 2), demonstrating that the user can adjust the phase based on temperature.
Figure 8. Phase drift of the ADF4356 over temperature, measured at a VCO frequency of 4GHz.
5G
Beamforming is a key technology to realize 5G network architecture. Multiple antenna array elements are used in these networks, each with a different phase and amplitude, to conduct the antenna energy directly to the end user. For this application, phase repeatability is key. Beamforming requires repeatability of the LO phase, and if this phase is uncertain, additional calibration of the beamforming circuit is required.
Figure 9 shows the pattern of two half-wave cells separated by a quarter wavelength and driven in phase. The antenna radiation pattern is nearly omnidirectional and no beamforming is observed. Figure 10 shows two elements driven by 90° out-of-phase signals, and the resulting radiation pattern shows a more concentrated radiation pattern. As the number of element arrays increases, so does the accuracy of the radiation pattern towards the end user, further improving spectral efficiency.
Figure 9. No beamforming
Figure 10. Beamforming
The phase resynchronization function ensures that the uncertainty of the LO phase characteristics is eliminated. In addition, the ability to adjust this phase provides the user with another way to overcome any other phase delays present in the circuit that are difficult to adjust by beamformers or baseband circuits.
in conclusion
Phase resynchronization places the ADF4356 and similar PLL devices into a known phase, which enables many applications and greatly simplifies the calibration procedure.
“As the name implies, a phase-locked loop (PLL) uses a phase detector to compare the feedback signal with a reference signal, locking the phases of the two signals together. While there are many uses for this feature, PLLs are most commonly used today for frequency synthesis, typically as a local oscillator (LO) in an upconverter/downconverter, or as a high-speed analog-to-digital converter (ADC) or digital-to-analog converter DAC (DAC).
“
As the name implies, a phase-locked loop (PLL) uses a phase detector to compare the feedback signal with a reference signal, locking the phases of the two signals together. While there are many uses for this feature, PLLs are most commonly used today for frequency synthesis, typically as a local oscillator (LO) in an upconverter/downconverter, or as a high-speed analog-to-digital converter (ADC) or digital-to-analog converter DAC (DAC).
Until recently, we paid little attention to phase behavior in these circuits. But with ever-increasing demands for efficiency, bandwidth and performance, RF engineers must introduce new technologies to improve spectral and power efficiency. Repeatability, predictability, and adjustability of signal phases play an increasingly important role in modern communications and instrumentation applications.
everything is relative
Regarding phase measurement, it is meaningless if not relative to another signal or relative to the original phase. For example, using a vector network analyzer (VNA) to measure the phase of a two-port network such as an amplifier, the output phase is measured relative to the input phase ANG (S21). The single input phase refers to the reflected phase relative to the incident phase ANG (S11). On a PLL synthesizer, a phase measurement refers to a measurement of the phase relative to an input reference or a measurement of phase between signals. The ideal of any phase measurement is to measure the exact expected value compared to the original phase, but nonlinearity, non-ideality, temperature differences and board traces, and other manufacturing variations can make the phase more susceptible to changes in signal generation. For the purposes of this document, “in-phase” refers to signals that have the same amplitude and timing characteristics; deterministic phase means that the phase shift between signals is known and predictable.
Oscilloscope measures phase
To compare the phase of two different frequencies, a high-speed oscilloscope can be used to compare the output phase to the reference phase, which is a relatively intuitive method. In order to be intuitive, the input phase and output phase must usually be integer multiples of each other. This is relatively common in many clock circuits. For integer-N PLLs, the relationship between the input frequency (REFIN) and the output frequency (RFOUT) is usually deterministic and repeatable. Just place the scope probe on REFIN and RFOUT, but take care to only capture the signal when the established phase is determined. Advanced oscilloscopes like the RTO1044 allow event trigger activation only when certain conditions are met: such as when a specific digital pattern is written to the PLL device and a rising edge of a known signal occurs. Given that there may be some delay between the writing of the digital mode and the final signal settling, it is critical to insert some delay between these two events, which is possible with this particular model of instrument.
The measurements in Figure 1 were made to confirm that the phase delay of the ADF4356 PLL relative to a known reference signal (in this case, another ADF4356 set to the same output frequency) is constant and repeatable at power-up. To properly set up the instrument, connect two low-speed probes to the CLK and DATA lines of the ADF4356 SPI interface. To write a digital pattern to a specific frequency, you must wait 1 second before the instrument captures a time domain plot showing the outputs of the two PLLs.
Figure 1. Integer-N Divide Setup
For this measurement, two ADF4356 PLLs were locked to a VCO frequency of 4GHz and divided over the range of 8MHz to 500MHz, with one PLL turned on and off repeatedly using a software power-down feature. The oscilloscope takes 119 acquisitions in infinite duration mode with a constant and repeatable phase difference between the two PLLs. To ensure that the phase difference is repeatable, there are a number of considerations to follow. In comparison, a low R divider value introduces less uncertainty than a high R divider value, and it is critical to feed the divided feedback from the VCO output to the N counter input. Given that the ADF4356 PLL and VCO contain 1024 distinct VCO bands, it is important to use a manual calibration overlay procedure to remove this uncertainty.
Phase Resynchronization Definition
Phase resynchronization refers to the ability of a fractional-N PLL to return the same phase shift at every given frequency. That is, after frequency A with phase P1 is changed to frequency B, when the frequency is reset back to F1, it is observed that it still has the same original phase P1. This definition ignores changes caused by factors such as VCO drift, leakage current, temperature changes, etc.
Resynchronization sends the reset pulse to the fractional-N sigma-delta modulator, which puts it in a known repeatable state. This reset pulse needs to be applied after completing the frequency settling mechanisms such as VCO band selection and loop filter settling time. Its value is controlled by the timeout counter in register 12. Recent PLLs are able to adjust the timing of this reset pulse, enabling a degree of output signal tunability. In addition, it can change timing in 360°/225 steps, making measurements easier than most instruments.
Figure 2. Fractional-N Resynchronization, Frequency Range 4694 MHz to 4002.5 MHz
For this experiment, both ADF4356 VCOs were set to 4002.5 MHz with a divide-by-8 frequency. The VCO frequency of the second PLL was set to 4694MHz and then set back to 4002.5MHz. Examining the PLL behavior with an oscilloscope shows that after 1700 frequency changes, the PLL settles at the same phase every time.
To characterize different phase shift characteristics, the phase word is set to 4194304/225 (equivalent to 90°). Set the corresponding similar values for 90°, 180°, 270°, and 0° and look at the oscilloscope again (Figure 3).
Figure 3. Phase Resynchronization with Variable Phase Shift
Four equally spaced signals were observed relative to the original signal on channel 1, confirming the accuracy of phase resynchronization with programmable offset.
This feature is very useful and means that a look-up table of phase values can be created for each user frequency, recording the phase value with each use. In applications that require combining four in-phase LO frequencies, phase resynchronization and offset functions are used to adjust the output phase, which together provide 6dB lower phase noise. If used as an adjustable LO (perhaps on the first stage of a signal analyzer), the resynchronization and phase shift functions allow the user to perform a one-time calibration at power-up to determine the exact phase value of each LO. When used as an LO, the phase value can be set per LO as needed, eliminating the need to perform calibration at each frequency.
Figure 4. Phase-critical applications requiring precise control of PLL output phase
For phase-critical applications like a network analyzer, the circuit can measure the phase value at each frequency at power-up and set it as needed, as the LO acts on the entire target range.
Measuring Phase, Vector Signal and Network Analyzers
Vector signal and network analyzers can also be used to characterize phase behavior, although they are limited to comparing the phase of a device to its initial value. Advanced analyzers such as FSWP can be put into FM demodulation mode and selected for phase output.
This is useful for evaluating the phase resynchronization feature on the ADF4356 PLL. The trace below (Figure 5) shows the ADF4356 phase shifted by 180° at an output frequency of 5025MHz.
Figure 5. FSUP FM Demodulator Output with 180° Phase Shift
Phase adjustment
The phase adjustment feature avoids sigma-delta modulator resets by simply adding a phase word between 0° and 360° to the existing phase. This is useful in applications where phase resetting is not desired. It can be used to dynamically adjust the phase word to compensate for phase differences due to effects such as temperature.
Phase adjustment adds phase to the existing signal each time R0 is updated (with the programmed value of Register 3). It does not contain reset pulses such as phase resynchronization. The following measurements from the FSWP represent the original signal increased by 90° (Fig. 6) and 270° (Fig. 7). In both cases, the output frequency of the ADF4356 was set to 5025 MHz before the phase change.
Figure 6. 90° Variation
Figure 7. 270° Variation
Behavior over the entire temperature range
The physical parameters of an Inductor change with temperature, as do its electrical properties, which appear as phase changes. To reduce this phase change, the user can set the desired phase shift to maintain the same phase. Two ADF4356 PLLs with an output frequency set to 4GHz, placed in the same furnace chamber with the same phase, closely track each other’s phase (Figure 2), demonstrating that the user can adjust the phase based on temperature.
Figure 8. Phase drift of the ADF4356 over temperature, measured at a VCO frequency of 4GHz.
5G
Beamforming is a key technology to realize 5G network architecture. Multiple antenna array elements are used in these networks, each with a different phase and amplitude, to conduct the antenna energy directly to the end user. For this application, phase repeatability is key. Beamforming requires repeatability of the LO phase, and if this phase is uncertain, additional calibration of the beamforming circuit is required.
Figure 9 shows the pattern of two half-wave cells separated by a quarter wavelength and driven in phase. The antenna radiation pattern is nearly omnidirectional and no beamforming is observed. Figure 10 shows two elements driven by 90° out-of-phase signals, and the resulting radiation pattern shows a more concentrated radiation pattern. As the number of element arrays increases, so does the accuracy of the radiation pattern towards the end user, further improving spectral efficiency.
Figure 9. No beamforming
Figure 10. Beamforming
The phase resynchronization function ensures that the uncertainty of the LO phase characteristics is eliminated. In addition, the ability to adjust this phase provides the user with another way to overcome any other phase delays present in the circuit that are difficult to adjust by beamformers or baseband circuits.
in conclusion
Phase resynchronization places the ADF4356 and similar PLL devices into a known phase, which enables many applications and greatly simplifies the calibration procedure.
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